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This is NP-exhausting akin to the Map Colouring Problem, it could solely be bruteforced or approximated. CPU, transactionally iterates over every codeblock for trailing GOTOs. Regardless of whether thats achieved it next initializes some flags, counters, allocators, register sets, etc a few of which is CPU-specific. For every it iterates over all enter operands, & twice over successor edges therein on the lookout for abnormal edges it ought to skip or otherwise perform exits to temporarily augment with noops. If optimizing away indirect jumps yields any clearly useless directions to delete itll reanalyze the dataflow once more. Presumably with the dominators tree. Several further iterations over the registers & their uses, codeblocks, and so on computes stats for register allocation to discuss with. This is probably the most compiletime-optimum place to put an unrelated setjmp() warning subpass. With alias & loop evaluation it iterates over codeblocks & directions therein to notice perform calls, optionally iterates over caller-save regs to include in its register-alloc datamodel, optionally iterates over codeblocks & directions therein to notice equivalent regs, iterates over pseudoregs to see if they can now be inlined, & optionally over instructions to report store equivilents.
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P.S. This go may be compiletime-disabled. The shorter a pseudoregister lives the more flexibility the register allocator has in assigning it a CPU (digital) register. Throughout that initialization it conditionally iterates over the code to collect regions utilizing a collection of loops depending on the control movement. The register allocator, as an NP-hard drawback, will need all the help it might get! And it computes an ordinary dominators tree. It then collects bitmasks describing control move, computes per-instruction precedence taking the max, collects directions to schedule, & iterates over the codeblocks again to schedule them using the previously initialized callbacks. Using generic scheduling code to dequeue directions & insert them of their new locations with GCC debugging information.The specialised code inserts the instructions in a temp array (which itll iterate over yielding the optimized code) to plan their new positions. For every (with some variation) it removes empty codeblocks, initializes runtime memfences, shcedules the instruction around them (by splitting linked lists while assigning & sorting per-instruction sequence numbers), & specially bruteforces with reference to bitmasks an optimal order for CPU pipelining.